"In fact for typical HPC codes Barcelona annihilates the Intel chips. We have just ordered a new HPC machine at my university and I had all the fun of running the benchmarks. For a single thread Intel was up to 50% faster, but for anything with a large memory footprint the Intel chips (even 45nm ones) with the FSB just fall over. For problems using 8GB RAM (8 threads) the K10's were twice as fast comparing 2.2 GHz Barcelona vs 3 GHz Harpertown chips. I just wish we could have had 3GHz Barcelonas..." by highlandmooseI wonder why there is no tests on server area? This comment also worth quoting:
"The Northwood being a good chip is a fallacy that people try to advance to show how much better they understand the market, and how overly simple most people are. The latter is true, but also saying the Northwood was so good is also an oversimplification. It was a huge, power hungry chip that was generally more powerful than the other company's much older design, but not always. It's the same argument I would use against the Athlon though, it used a lot more power, and was much bigger, but the performance advantage was more substantial since it could match the P III clock for clock (and greatly surpassed it in FP), and could also run at much higher clock speeds. The Northwood was enormous, and had miserable IPC, and didn't outperform the Athlon by very much.It is also a mystery that few sites comment about how power hog were Northwood, Prescot and Pentium D(ouble). Now check this out:
In the end, the Pentium III design as it moved along the mobile route proved to be an excellent and balanced design, and is finally the dominant processor again in the current iteration of Penryn. The Athlon and Athlon 64 only looked good against the grotesque Pentium 4 line, which combined the twin virtues miserable IPC with huge size/power use. Why Intel ever used this chip, after seeing how good the Pentium Ms were, is a mystery to me." by TA152H
"Intel's Core2 architecture is based on the Core and thus P6 architecture, so what wrong with AMD leveraging the strengths of their previous architectures. If it isn't broke, don't fix it. (Not saying they can't fix other areas of the processor)Now that is a good comment.
Atom is somewhat innovative, but is mostly based on older designs using newer processes with an extremely low power overall design goal. It's a very good design, but the innovation is more in creating a market where one didn't really exist before.
Intel didn't innovate quad core, they innovated double dual core. This was really an innovation that they made with the double core Pentium Ds. While not a long term performance enhancing innovation, it should not be shrugged off either. It allowed Intel to offer two cores when they couldn't have otherwise. They also maintained higher margins this way as the yields were much higher than they would have been if they tried to get two cores on a single die. And guess what, AMD is following suit.
Penryn wasn't all that innovative as an architecture. However, the new process is a huge innovation. It's not a simple refinement in lithography technology. They had to change the way transistors were made. You can only deny that it is innovative if you call it inventive.
To be fair, AMD has been innovative as well. AMD's HT interconnect technology is routed like a crossbar switch. Effectively, this means that core 0 and core 2 can talk while core 1 and core 3 talk (or any other mutually exclusive combo) with no penalties. I don't know what Intels variation on HT will do, but if they design it like time division multiplexing (TDM) switches, they will have additional latency in some cases. More importantly, the processors will get extremely hot if they run the link fast enough to allow all processor simultaneous communications using TDM." by JPForums
"Whoever stated that a 60 USD processor (X2 4850) wouldn't be sufficient for today's gaming ?"Now try to alt+tab.
# cat /proc/cpuinfo
processor : 0
cpu model : MIPS 4KEc V4.8
BogoMIPS : 149.91
wait instruction : no
microsecond timers : yes
extra interrupt vector : yes
hardware watchpoint : yes
VCED exceptions : not available
VCEI exceptions : not available
Eduardo and Li will be creating a hi-level/convenient python component
on top of dbus-python.
HFP Emulation
mentor: Vinicius Costa Gomes
student: Firas Omar Assaad
Vinicius and Firas will be working on making your computer look as a Bluetooth
Hands-Free device.
Extend obex-data-server with BIP support
mentor: Claudio Takahasi
student: Tadas Dailyda
Tadas is already know by BlueZ comunity for his work in last year summer of code,
this year he will be mentored by Claudio to extent obex-data-server.
